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Simulation of Wujian100


Wujian100_open is an open source RISC-V project by Ali Pingtou on Github. This document simulates Wujian100 in Linux environment.

Experimental procedure

1. Download the official code

The emulation of No Sword requires a Linux environment. Here, the SSH terminal of MobaXterm is used to connect to the Ubuntu workstation.

Create a folder as the project folder: mkdir wujian
Change the working directory to this folder: cd wujian
Download Wujian100's code from github to this folder: git clone

2. Download the toolchain

Download the toolchain on the official website of Pingtouge. The version may be different, just download the latest one.

Create the toolchain folder: mkdir riscv_toolchain
Change the working directory to this folder: cd riscv_toolchain

Put the downloaded toolchain zip file in this folder, drag and drop the file directly here, and upload the file from the Windows machine to the workstation of the Ubuntu system. You can also use the cp copy command to copy to the folder.

Unzip files: tar -zxvf riscv64-elf-x86_64-20210512.tar.gz

Wait for the decompression to complete.

3. Modify the script

Since the original script is the setup.csh file, there are some incompatibilities in the bash environment. Here is a new script, as shown in the figure below, put it in the wujian100_open/tools directory (original setup.csh directory)

Cd to wujian100_open/tools directory:

Here is also to upload the file of the Windows machine to the workstation.

Input: source

4. Run the simulation

Go to the wujian100_open/workdir directory to run the simulation: cd ../workdir
Start running the simulation: ../tools/run_case -sim_tool iverilog ../case/timer/timer_test.c

Simulation succeeded

5. View the simulation waveform

After running the simulation, test.vcd will be generated in the wujian100_open/workdir directory, as shown in the following figure. The VCD file contains the change information of the signal, which is equivalent to recording the information of the entire simulation. We can use this file to reproduce the simulation and display the waveform.

Because VCD is part of the Verilog HDL language standard, all verilog simulators can view this file.
Here is an introduction to viewing waveforms with Modelsim software. Transfer the generated test.vcd file to the Windows host and store it in the E:/Project/wujian100_sim folder.

Open the Modelsim software
Click File->Change Directory to change the directory to the directory of test.vcd; or directly enter the console in Modelsim: cd E:/Project/wujian100_sim to directly set it to this folder.

Because Modelsim only supports .wlf waveform files, format conversion is required.
In the console in Modelsim enter: vcd2wlf test.vcd test.wlf

Open test.wlf in Modelsim, click File->Open->test.wlf

Select the signal to be observed in the object tab and add it to the waveform window.